Nios II software

Thank you very much ironmoose. I read the Avalon interface specifications. However I have another, suppose much simpler question for you, regarding parallel computing with dsp-multipliers (organizing them as multipliers) and manipulating them by the compiled c-code, and I do not understand completely and how do things work in a configured fpga chip.

I want to do somehow this:

a*b = c, d*e = f, g*h = i, j*k = l, m*n = o;

in my c,c++ code in a single clock cycle on a fpga by 5 dsp-multipliers configured on it.

1]How do I execute all 5 multiplication operations in a single clock cycle? How do I make it parallel in my code?

2]Or is there a special library that includes concurrent code writing in c,c++?

Does every instruction (of multiplication) go through fetch and load cycle and is done by NiosII processor, so that every single multiplication needs to have the processor involved? or the circuitry configured with those five dsp-multipliers does that without processor? Is the circuitry "parallel" itself?

3] Are there any other methods for doing this, perhaps configuring differently the hardware, or can be done by software?

Thank you in advance, hope I made myself a bit more clear than the last time.