NIOS II SOC Simulation with altera_avalon_mm_master_bfm

This tutorial describes how to simulate with the BFM

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

But does not discuss the NIOS processor. But if you have already simulated a system with a NIOS processor, the procedure should be no different. As far as the processor is concerned, so long as it has a clock, reset, and a boot memory, it should just boot as normal.

If you have a NIOS processor, why do you need a Avalon-MM BFM? The NIOS processor is already an Avalon-MM master.

Cheers,

Dave

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This tutorial describes how to simulate with the BFM

http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial

But does not discuss the NIOS processor. But if you have already simulated a system with a NIOS processor, the procedure should be no different. As far as the processor is concerned, so long as it has a clock, reset, and a boot memory, it should just boot as normal.

If you have a NIOS processor, why do you need a Avalon-MM BFM? The NIOS processor is already an Avalon-MM master.

Cheers,

Dave

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I did run a simulation with the NIOS and some software but it is way too slow to be useful. In the mean time I added the BFM and QSYS did not complain. I just wonder how the BFM and NIOS will co-exist and if NIOS which now has no SW to run on will not interfere with the BFM. Will the BFM be removed in systhesis? The USB-Blaster example is close to what I'm looking for however its the NIOS/BFM combination that I'm after. If it works is should run much faster.

Thanks for your help Dave :-P

Shvitzer

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I did run a simulation with the NIOS and some software but it is way too slow to be useful.

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No surprise there :)

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In the mean time I added the BFM and QSYS did not complain. I just wonder how the BFM and NIOS will co-exist and if NIOS which now has no SW to run on will not interfere with the BFM. Will the BFM be removed in systhesis? The USB-Blaster example is close to what I'm looking for however its the NIOS/BFM combination that I'm after. If it works is should run much faster.

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If the simulation sets up the environment such that the NIOS processor can boot, then it will, i.e., it will boot and slow your simulation :)

I'd recommend replacing the bootloader RAM image with something that causes the processor to go to sleep, eg., is there a halt instruction? (I don't use NIOS).

Alternatively, create your Qsys system with either the NIOS processor or the BFM, not both, and you'll get the fastest simulation.

The BFM can be left in the system for synthesis. If you read through the tutorial, you'll see comments to that effect. The BFM generates a bunch of warnings during synthesis, but those warnings can be ignored (the warnings are related to missing drivers, since the BFM IP is skipped).

Cheers,

Dave

Thanks Dave ! This was very helpful. I adapted this method to my NIOS based SOC and I was able to stimulate the Avalon bus with the Avalon Master BFM and it works great. I confirmed that you can leave the BFM in for systhesis. To get around the NIOS interference I simply kept it in reset by connecting the .reset_n (1'b0), (in

the simulation copy of the top-level). I used the QSYS generated testbench with all the generated external BFMs and simply added my own test_case_1.sv to it

and to the msim_setup.tcl

Shvitzer

Glad to hear you got it working!

Cheers,

Dave