Forum Discussion
Altera_Forum
Honored Contributor
12 years agoCris72, when I try to select my first FPGA image at 0 or my second one at 0x400000 with Remote Update core,
I still have this value 8 for the register 0x4 of the remote update core, IORD(REMOTE_UPDATE_CYCLONEIII_BASE, 0x4). Don't you any idea where can be the problem ?