Forum Discussion
Altera_Forum
Honored Contributor
7 years agoHi,
1. Check the reset pin/SW state, if we try to load/program elf into FPGA when reset is active(i.e Logic 0) we will face such issue. 2. Create a new eclipse project and check. Also, Check the old threads https://alteraforum.com/forum/showthread.php?t=34954 https://alteraforum.com/forum/showthread.php?t=41189 Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)