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Altera_Forum's avatar
Altera_Forum
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13 years ago

NIOS Code not running

Hi everyone,

I am designing a system on a custom board with a Cyclone IV E fpga. I am able to program my board from Quartus successfully. After designing my Qsys system, I create a Nios application with the correct sopcinfo file. I build my Nios project, and obtain a .elf file. This is the process I follow from here:

1. Perform sof2flash conversion.

2. Perform elf2flash conversion.

3. Concatenate both .flash files.

4. Use nios2-elf-objcopy to get my hex file.

4. Use Quartus II "Convert Programming Files" Utility. I input my hex file and specify my EPCS4 Device and generate my JIC file.

5. I use the quartus programmer to program my board with this .jic file.

It programs successfully but the Nios code is not running.

I would appreciate any help with this.

Thank you very much!

Zahi Hakim

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Is the Nios CPU configured to boot from the EPCS controller? You can included in your flashed .sof a Signaltap instance with a power-up trigger, so that you can see what the CPU is doing when its booting.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Does this mean I should set both the reset vector and exception vector in my CPU to point to the EPCS controller? Sorry I am not very experienced with using embedded processors.

    Thanks,

    Zahi
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    The reset vector should be set to the EPCS controller, so that the CPU can run the bootloader that will copy your application from the EPCS.

    The exception vector should be set to a writeable area, either an on-chip RAM or your external RAM.