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Altera_Forum
Honored Contributor
17 years agoNintendo DS Passthrough
Hiya, I'm trying to build a simple Nintendo DS card passthrough (also known as a "PassMe") -- basically use the FPGA as a man in the middle between the DS and DS card communication. I've writte...
Altera_Forum
Honored Contributor
17 years agoyou specify
inout [7:0] DSCARD0_DAT; as an 8 bit bidir signal you correctly used assignments for that, but only for 6 bit [5:0] and no assignment for bit 6 and 7 so you can combine these lines as assign DSCARD0_DAT[7:0] = (DSCARD0_RES & ~DSCARD0_RCS & ~IsCommand ) ? DSCARD1_DAT[7:0] : 8'bzzzzzzzz; assign DSCARD1_DAT[7:0] = (DSCARD0_RES & ~DSCARD0_RCS & IsCommand ) ? DSCARD0_DAT[7:0] : 8'bzzzzzzzz; your problem no starts here where you try to switch the direction from card0 to card1 and vice versa with a registered signal. this is some kind of an asynchron dataloop, hard to dig down the problem. i have no information about how hard the timing must be in this application but if possible try to write a fully synchronus design and pipe some of the signals that the or clock synchron to each other.