Honored Contributor
Honored ContributorWell, you need to start with the basics, like: are any packets at all coming into your FPGA. It's kind of brute force, but the easiest way ( I find ) is to put SignalTap on the TSE Avalon-ST ports. You ought to get an SOP trigger for every Ethernet packet you directed at your board.
There's other ways (software debugger) but I find this is the most direct way. If you've got no activity on the TSE Avalon-ST ports, and everything is in the "ready" state, then you need to look further at the MAC address to make sure it's programmed correctly, and then beyond that start looking at the PHY's. Alternatively, another way to debug it is to make sure that your board can actually transmit data that is seen by your PC (this will tell you the MAC address and the PHY are operating correctly); you can do this by modifying the hello world example to simply continuously send data on the network (e.g. while(1) sendto() ).
