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Altera_Forum
Honored Contributor
Honored ContributorNew to FPGA - Question...?
Hello,
I am new to Altera, FPGA and Verilog, however do have expirience programming TI TMS DSPs. How would you recommend starting the following basic design: I am looking to read a digital variable frequency square wave signal(200-1000Hz), count the number of clock cycles during each edge of the square wave, store this result in a register, then have a DSP read this result over a parallel bus? Any suggestions would be welcome? Should I code it all in Verilog or use some of the Megafuntions like latch etc..?2 Replies
Altera_Forum--- Quote Start --- im just wondering is this the general workflow for professional designers --- Quote End --- It's a possible way to do it. At least some designers prefer schematic entry for the top level, others (me to) a pure HDL (VHDL or Verilog) design. I think, the addressed functionality (counters, registers, timers) can be easily implemented as behavioral HDL.- Altera_Forum
I realize this question is pretty open,,,,but anyways I started the project by coding some Verilog modules then creating symbols for each and an overall schematic for the design. I guess im just wondering is this the general workflow for professional designers, is there a better way to do it with these tools? Maybe I can post some examples of my code/schematic to have some of the pros crituqe my design as I progress?
