Honored Contributor
Honored Contributorits really very simple board. The FPGA just connected to serial FLASH for future + JTAG for debug. It has single 50MHz external oscillator.
The other IO's are are for management of analog ADCs, DACs AMUXes I got the same behavior on 3 different boards. I just found something strange in the HDL evaluation board at page 6 http://www.hdl.co.jp/en/spc/acm/acm-023/acm023r1-man-en-v10.pdf they write that the JTAG-P2 is connected to 3.3V (the VCCIO), but ALTERA, in their manual write that it should be 2.5V... I begin to think that maybe, nevertheless the problem is in the JTAG interface despite of that i had checked this.... Tomorrow i'll get the boards again and re-check this issue again...
