Forum Discussion
Altera_Forum
Honored Contributor
15 years agoIndeed, I checked this today and it is new to me , in Cyclone III and IV DQS is only used to write out data (as required by the DDR2 devices) and reading is done with a separate capture clock in their Altmem-Phy. So they rely on the Tac specification of the DDR2 device, Tac is referenced to the incoming clock at the DDR2 device.
The major drawback of using Altmem-Phy though is that it is so big, Altera's memory controller with Altmem-Phy uses 2450 LEs in a CycloneIII, or half of the smallest EP3C5 device. And while compiling it spits out lots of warnings, confusing the user wondering whether it is his fault?