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Altera_Forum
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15 years ago

Need some help to use altdq and altdqs megafunction.

Hi, I am working on memory controller. In that data received from memory is edge aligned with clock. I want to give phase shift of incoming clock to 90 degree so that I can receive data cent...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Cyclone II did include a delay-circuit for DQS. Cyclone III and IV do not, so you have to ensure this delay by routing/constraints.

BTW: I think, the Altera-phy does rely on the DLL in the DDR(2)-memories (not in Mobile DDR!) which ensures that the DQS-phase is close to the memory-clock-phase. Additionally it fine-adjusts the capture-clock with the phase-shift-functionality of the FPGA-PLL by calibration. As far as I know, it does not use DQS for capturing the data.

Thomas