Ok fazhan, here's how it works (more or less).
Quartus is the multifunction tool; you can edit/compile/debug code for your FPGA using it.
Quartus also provides access to a tool called SOPC Builder, which allows you to assemble IP subsystems.
Multisim is one of many simulators that Quartus can interface with; If you want to use real test benches to verify your code you'll need a real simulator like Multisim.
Nios EDS is a C/C++ compiler for the Nios II soft processor.
So as an example, lets say we want to make a generic FPGA product...
1) You would write or buy all of your RTL
2) You would possibly integrate some IP into a subsystem using SOPC Builder, found in Quartus. This is how people make Nios II processor subsystems. The rest of the IP you integrate manually using your favorite HDL.
3)You would then use Quartus to assign pins, set timing constraints, and compile all of your IP into a format you can download to the FPGA.
4) You then use Quartus to download your code to the FPGA after compilation.
5)Woa! The code doesn't work! Use Modelsim or the feature simulator in Quartus to simulate your code and track down your bug. As a beginner the Quartus simulator is probably easier. Also, Quartus has a feature called SignalTap that allows you to inspect the logic in the FPGA realtime*, which can be a lifesaver during system bring up. Simulation is a key step that a lot of FPGA designers skip. At least spot check your code with some low coverage sim; it will save you a lot of time in the long run.
6)In parallel with your debug, software people will use the Nios II EDS to develop all of the C or C++ code that will run on the Nios II processor.
Thats it! Of course there are many many fine points that I left out, but the main idea is Quartus is for FPGA code, Modelsim is for simulating FPGA code, and EDS is for C/C++ code.
Good luck!
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