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Altera_Forum's avatar
Altera_Forum
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16 years ago

need help with some vhdl syntax

Hi, there: I have been working with niosII for days. When I checked the vhd files that SOPC builder generated, I found some syntax that I had never encountered. They were: 1. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

You are correct - the ' is a way of "casting" - converting the type to std_logic or std_logic_vector. You are also right that it is probably redundant. Try compiling without the casting?