Need Advice - First time PCIe device development + QSYS

Hi Evgeni,

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There is a PCIe core serves as an Avalon-MM master. User specifies, for example, 64Mbyte BAR, or 26bit. But I found that Qsys recalculates this to lower value, based on the actual addresses of connected Avalon slaves, for example 24 bit

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Ok, so your application is to use the Qsys PCIe core as a target device. My "complaints" relate to its short-comings as a PCIe master :)

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By "worst case" I meant the most complex PCIe configuration of designs I work with.

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That's clearer, thanks!

Cheers,

Dave