Need Advice - First time PCIe device development + QSYS

Hi Dave,

Just to clarify that we're talking about Endpoint, not PCIe Root device.

In this particular design PCIe is Avalon-MM master. 24-bit address is calculated automatically by Qsys system builder; it probably looks at the highest address of all connected Avalon-MM slaves.

I didn't have a chance to deal with the case you described. The "worst case" design is 64-bit PCIe Endpoint connected to an embedded processor (PCIe Root) + DMA. So we can control memory allocation scheme on that processor.

Thanks,

Evgeni