Forum Discussion
Altera_Forum
Honored Contributor
14 years agoEstimating gate usage on large designs is pretty impossible. Its easier just to implement it. You can usually work out the memory and multiplier requirements though.
Floating point isnt really suited to FPGAs. you need cores that use a large amount of resources and the latency is higher. fixed point is what FPGAs are good at. you can get a fixed point toolbox for simulink that should help you with that. The Altera equivolent of the spartan is the Cyclone. Unless you need loads of IO and high speed interfaces, cyclone should be ok for you. But dont underestimate how hard your task is going to be. If you're a software guy, forget all you know and go back to logic basics before you go near any HDL. Software guys can write some really bad HDL. You have to design the circuit before you write any HDL. Often this may mean re-architecting your controller design to better match your implemented hardware. This also makes verification easier.