Need a crash course in FPGAs

Easiest start would be to get a development board like the DE2

http://www.altera.com/education/univ/materials/boards/de2/unv-de2-board.html

and download Quartus II

Then read a book or watch the training videos

http://www.altera.com/education/training/trn-index.jsp

As for vector control of induction motors. I have read several papers written by academics on the topic.

It will take a few weeks/days to get aquainted with the language as it is a hardware description language whereas you are describing the logic you need for a certain design.

early on you'll want to consider if you need fixed or floating point calculations. also consider what sample rates you'll need and if there are any feedback paths (slow things down). try to break the algorithm down into pieces that can be done in parallel

if you are going to look at design services a block diagram is a good idea

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As for vector control of induction motors. I have read several papers written by academics on the topic.

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Same here - it was because of a couple of academic papers I read (and one better-than-average thesis) that I saw some serious advantages in offloading all of the math-intensive motor control functions in an FPGA. Prior to that mini-revelation I was resigned to trying to get a 200MHz+ DSP to work inside a 200kW+ inverter.

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It will take a few weeks/days to get aquainted with the language as it is a hardware description language whereas you are describing the logic you need for a certain design.

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Huh. No mention of MATLAB/Simulink, just get a dev kit and download (er, run on the web?) Quartus II? As we say with tongue firmly ensconced in cheek around here: How Hard Can It Be? :D

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early on you'll want to consider if you need fixed or floating point calculations. also consider what sample rates you'll need and if there are any feedback paths (slow things down). try to break the algorithm down into pieces that can be done in parallel

if you are going to look at design services a block diagram is a good idea

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Most of the field oriented control schemes can benefit greatly from floating point calculations; the direct torque control schemes are generally much simpler. Space vector modulation definitely needs floating point if calculated on the fly; lower-performance versions are done with lookup tables.

I don't have any hard Altera part numbers, but one paper did FOC + SVM with a Xilinx Spartan 3E. Not sure (yet) what the equivalent Altera part is. A related question would be, is it possible to estimate how many "gates" I'll need to perform a certain function or group of functions without totally designing the functions in a HDL? Ie - to sort of do a first pass evaluation of it is feasible/economical to use an FPGA for the task(s)?

Estimating gate usage on large designs is pretty impossible. Its easier just to implement it. You can usually work out the memory and multiplier requirements though.

Floating point isnt really suited to FPGAs. you need cores that use a large amount of resources and the latency is higher. fixed point is what FPGAs are good at. you can get a fixed point toolbox for simulink that should help you with that.

The Altera equivolent of the spartan is the Cyclone. Unless you need loads of IO and high speed interfaces, cyclone should be ok for you.

But dont underestimate how hard your task is going to be. If you're a software guy, forget all you know and go back to logic basics before you go near any HDL. Software guys can write some really bad HDL. You have to design the circuit before you write any HDL. Often this may mean re-architecting your controller design to better match your implemented hardware. This also makes verification easier.

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Estimating gate usage on large designs is pretty impossible. Its easier just to implement it. You can usually work out the memory and multiplier requirements though.

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Ok. That's not ideal but, well... nothing ever is, really.

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Floating point isnt really suited to FPGAs. you need cores that use a large amount of resources and the latency is higher. fixed point is what FPGAs are good at. you can get a fixed point toolbox for simulink that should help you with that.

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*groan* - I thought that the massively parallel structure would effectively make them good at floating point?!

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The Altera equivolent of the spartan is the Cyclone. Unless you need loads of IO and high speed interfaces, cyclone should be ok for you.

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Excellent. I don't need lots of I/O on the FPGA - just the inputs to the delta-sigma ADCs for monitoring phase current and bus voltage, and the encoder inputs for rotor position feedback. All the other i/o will be handled by the supervisory processor (probably one of those Stellaris ARM's with built-in ethernet MAC/PHY).

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But dont underestimate how hard your task is going to be. If you're a software guy...

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Ah - I forgot to mention that. I'm the hardware guy. Worse is that my specialty is in high power switchmode conversion so I am probably hopelessly out of my depth here. I already figured that dumping this on our software guy wouldn't be good, and maybe taking it on myself wouldn't be any better, but it is, nevertheless, my responsibility to give this FPGA stuff a fair shake, maybe even the ol' college try, before buying/licensing IP or relying on the free motor control libs from TI for their DSPs.

That said, I still feel that putting the motor control functions into an FPGA is the way to go. It just seems like it will get the job done better and faster. I am basing this on relatively scant information at this point, I will admit, but it just seems right.

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*groan* - I thought that the massively parallel structure would effectively make them good at floating point?!

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The big question is do you really need floating point? do you really use the entire dynamic range? fixed point gives you good precision with the bonus that all the arithmatic is just integer arithmatic (using very few resources and 1 clock to complete).

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The big question is do you really need floating point? do you really use the entire dynamic range?...

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Dunno for sure - that's technically above my pay grade (these days even janitor is above my pay grade, but that's another issue altogether)...

Hmm... I notice that a lot of these buggers run on 1.5V. 1.5V logic and 200kW motor drives tend to not get along. Definitely don't want to implement the ADCs in the FPGA if nothing else.

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FPGAs dont have internal ADCs. You need external ones.

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That makes sense. An ADC that runs off 1.2 or 1.5V doesn't make much sense in my applications.

Anyway, I just downloaded and installed Quartus II - Web edition. My first impression is that the program is a bit intimidating, but also bass-ackwards. I have to choose a target device BEFORE I design the hardware??? Why can't I design the hardware then have Quartus tell me which devices will work?

I feel stymied already, and I haven't even placed a single pin. :(