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early on you'll want to consider if you need fixed or floating point calculations. also consider what sample rates you'll need and if there are any feedback paths (slow things down). try to break the algorithm down into pieces that can be done in parallel
if you are going to look at design services a block diagram is a good idea
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Most of the field oriented control schemes can benefit greatly from floating point calculations; the direct torque control schemes are generally much simpler. Space vector modulation definitely needs floating point if calculated on the fly; lower-performance versions are done with lookup tables.
I don't have any hard Altera part numbers, but one paper did FOC + SVM with a Xilinx Spartan 3E. Not sure (yet) what the equivalent Altera part is. A related question would be, is it possible to estimate how many "gates" I'll need to perform a certain function or group of functions without totally designing the functions in a HDL? Ie - to sort of do a first pass evaluation of it is feasible/economical to use an FPGA for the task(s)?
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