New ContributorHello,
I'm wondering what happens exactly if I drive the nConfig pin low on Cyclone V SoC devices. The pin guidelines say that reconfiguration is initiated, the device enters a reset state, and I/Os are tristated.
Does the FPGA fabric see this signal so that flip-flops initialize in a defined state or does the FPGA rely on Power up values after the nConfig pin is driven low?
Thank you
Super ContributorHi,
You can read more about nconfig driven low in Cyclone V device handbook.
https://www.intel.com/content/www/us/en/docs/programmable/683375/current/configuration-sequence.html
Regards,
Aiman
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