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Honored Contributor
Honored ContributorMy 1st MAX 10 design
Well, I can't hide that I'm a bit scared. This is my 1st FPGA design and I'm doing it without having the MAX 10 here to test first. I know that I might be asking too much :) but do you guys see an...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- JTAGEN is correctly wired with a pull-up, but I don't see the purpose of connecting it to JTAG header pin 8. --- Quote End --- Well, connecting JTAGEN to pin 8 of the JTAG header was simply copying from the MAX 10 evaluation board schematics: https://alteraforum.com/forum/attachment.php?attachmentid=14076&stc=1 But I guess since I'm not using the JTAG pins for anything else other than the dedicated JTAG functions I could simply leave it with the pullup.
