Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

My 1st MAX 10 design

Well, I can't hide that I'm a bit scared. This is my 1st FPGA design and I'm doing it without having the MAX 10 here to test first. I know that I might be asking too much :) but do you guys see an...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Basically O.K., but you should consider the connection guidelines for pins nCONFIG, nSTATUS, CONF_DONE (pull-up) and CONFIG_SEL (pull-down).

JTAGEN is correctly wired with a pull-up, but I don't see the purpose of connecting it to JTAG header pin 8.