Multiplexer output for clock signals

Question

Hi all,

I tried to make a 2:1 clock mux in MAXII CPLD. Is it possible to have the glitches at the output even though the selection line is static?

How could we can avoid glitches in case of dynamic selection line?

Regards,

Vijay

altera_forum · Answer

--- Quote Start ---

I tried to make a 2:1 clock mux in MAXII CPLD. Is it possible to have the glitches at the output even though the selection line is static?

--- Quote End ---

Yes, you can gave glitches if more than one LUT input switches at about the same time while the mux select input to the LUT is static.

--- Quote Start ---

How could we can avoid glitches in case of dynamic selection line?

--- Quote End ---

Forum Discussion