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Altera_Forum
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17 years ago

Multiplexer output for clock signals

Hi all, I tried to make a 2:1 clock mux in MAXII CPLD. Is it possible to have the glitches at the output even though the selection line is static? How could we can avoid glitches in case o...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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I tried to make a 2:1 clock mux in MAXII CPLD. Is it possible to have the glitches at the output even though the selection line is static?

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Yes, you can gave glitches if more than one LUT input switches at about the same time while the mux select input to the LUT is static.

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How could we can avoid glitches in case of dynamic selection line?

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See post# 7 at http://www.alteraforum.com/forum/showthread.php?t=2388.