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tedh4ddv
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3 years ago

multiple sof fpga configuration files stored in single flash

I gather that two or more .sof files may be combined to a single .jic file and written to an active serial flash device using the Serial Flash Loader IP core. I am not clear on how the fpga can be t...
Configuration
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tedh4ddv
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2 years ago

As I mentioned, we currently have a SPI_to_SerialFlashLoader platform in the design. We want to keep that function in place for loading new Flash images. When adding the SPI_to_RSU platform, which will be comprised of a SPI_To_AvalonMaster plus the RU Core, how is access to the Serial Flash interface handled? Do I require external multiplexing for the DCLK, DOUT, DIN and nCE pins? Or can the new SPI_to_RSU Platform handle both functions?

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tedh4ddv
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2 years ago

Asking more simply, does the RSU Core handle the loading of a new .jic file into serial flash along with handling the switching between configurations?

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    tedh4ddv
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    ...or would I need to connect the Avalon output from the SPI_to_AvalonMaster core to both the Remote_Update core AND the AvalonSlave_to_SFL cores?