Multiple High Speed ADCs via serial LVDS

One point of relief: THE LTc2173-12 delivers a 90° shifted serial bit-clock so you don't need any PLL's to capture the incoming data.

You can drive all ADC clocks with a single PLL driving multiple outputs (using ALTDDIO_OUT). If you lay-out your board carefully you can achieve simultaneous sampling of your input data over all ADC-channels. I used that to sample 128 channels using 16 octal ADCs (by TI) delivering 12 bit at 50 MS/s. Unfortunately I don't have any nice documentation (as Dave makes) on this, and have to look deep in the design notes (paper) file.

You don't need to use ALTLVDS_RX to capture a 560 MBit/s DDR stream. You choose the DCO as the input clock and treat the FR as an input signal like the OUT channels, and use this FR signal to qualify the serial to parallel conversion. This technique also works for Texas Instruments and Analog Devices ADCs (and presumably other manufacturers).