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Altera_Forum
Honored Contributor
14 years agoYour flag is driven in two processes. the second process sets it permanently to high...
You must have a clock input as fast as serial stream (at least) then you run a counter(integer 0 ~ 8) set at zero at MSB or LSB location then increment to 8 and reset zero.
(vhdl clocked process)
--detect edge of switch
switch_d <= switch;
if switch = '1' and switch_d = '0' then
count <= 1;
elsif count < 8 then
count <= count + 1;
end if;
if count < 8 then
output(count) <= input;
end if;
if count = 7 then
valid <= '1';
else
valid <= '0';
end if;