Honored ContributorHi,
We are working on a board including a Cyclone III FPGA. The MSEL pin belong to bank 6 which VCCIO in our design is 1.8V. Is it still valid to use a 2.5V voltage with this configuration ? If so, how come ? Best regards, JF
Honored Contributorfrom: http://www.altera.com/literature/hb/cyc3/cyc3_ciii51010.pdf
--- Quote Start --- The MSEL pins are powered by the VCCINT power supply of the bank in which they reside. --- Quote End ---Honored ContributorI did'nt find this quote in the document you linked.
It says that the MSEL pins should be connected to ground or VCCA (2.5V), so it's independent of the bank VCCIO. On the other hand the signals to the configuration device use the VCCIO levels of the bank they are in.Honored Contributorsorry, page 2 of the PDF under:
Configuration SchemesHonored ContributorSorry I didn't see it. I wonder why it wasn't picked up by Acrobat's search function.
Anyway, just before the table, the datasheet indeed says that the MSEL pins should be connected to VCCA or ground. This means that they must be connected to 2.5V level signals, even if the bank is powered at 1.8V.
