Usual Moore machines don't have necessarily synchronous outputs, see e.g. the Moore HDL template in Quartus. It assigns outputs in a combinational case structure which can have glitches as well.
The glitches will be only noticed when processing the state machine output asynchronously or using them as external outputs.
The basic Moore machine description in literature however doesn't exactly specify how outputs are generated. You can write a Moore machine in a single synchronous process, that assigns both state variable and outputs to registers.