Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- That is right, all input and output signals of this FIFO are undefined. When I run the simulation, I only get "XXXXX", when I attempt to read the FIFO's status bits ( Empty flag, Full flag, wordsin). Any ideas? --- Quote End --- Hi, where is the instanciated ? In your design or in the testbench ? Kind regards GPK