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Altera_Forum
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18 years ago

Mixing FPP and AS for programming FPGA

Hi, I'm having trouble using the Quartus II software, so I'm going to leave it for the moment. The system I'll be designing is with the Stratix IV FPGA, using our own user logic as well as ou...
Altera_Forum's avatar
Altera_Forum
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18 years ago

I will second what FvM is saying.

Go ahead and choose FPP as your configuration scheme. Then write your CPLD code so that it can pull and load different images from the flash to configure the FPGA. Then just make sure you leave a couple of pins between the FPGA and CPLD so the FPGA can inform the CPLD what image it wants loaded and trigger a reconfig. Your CPLD code can handle the logic of defaulting back to a safe image if the FPGA fails to configure.

We actually do this same thing now on one of our designs (except we use passive serial).

Jake