Missing virtual jtag documentation

Note that I was explicitly talking about VJI, which I did in one design many years ago. This is a way to get signals into the FPGA through JTAG from a Tcl console. It is not the same thing as the SOPC JTAG UART(I'm sure the underlying parts are the same, but the UART it built up quite a bit more than VJI). The VJI, I believe, is for people who want to access the internals of the FPGA independently of SOPC Builder. It doesn't get used a whole lot because it requires you to build the end logic in the FPGA(which, when it does get used, is exactly what hte user wants). You might want to try nioswiki.com.