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Chris2000's avatar
Chris2000
Icon for New Contributor rankNew Contributor
5 years ago

missing files in quartus\libraries\megafunctions

I have a QSYS module from a previous design for a Cyclone 5 that was successfully implemented using Quartus Std 18.1.

I am using this module on a new Arria 10 design using Quartus Pro 20.2.

I get this error when I compile the design in Quartus 20.2:

Error(287062): Can't open AHDL Include File stratixgx_lvds_receiver.inc

The file is present in the Quartus 18 directory:

C:\intelFPGA\18.1\quartus\libraries\megafunctions\stratixgx_lvds_receiver.inc

C:\intelFPGA\18.1\quartus\libraries\megafunctions\xml_info\stratixgx_lvds_receiver_info.xml

C:\intelFPGA\18.1\quartus\libraries\megafunctions\stratixgx_lvds_transmitter.inc

C:\intelFPGA\18.1\quartus\libraries\megafunctions\xml_info\stratixgx_lvds_transmitter_info.xml

But it is not present in the Quartus 20 directory. However the corresponding transmitter file is present. Why is only the receiver file missing? I could try to copy it over from Quartus 18, but I would like a solution that doesn't break with the next Quartus update.

C:\intelFPGA_pro\20.2\quartus\libraries\megafunctions\stratixgx_lvds_transmitter.inc

C:\intelFPGA_pro\20.2\quartus\libraries\megafunctions\xml_info\stratixgx_lvds_transmitter_info.xml

2 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    My guess would be that Cyclone V used the old Stratix GX IP and since Cyclone V is not supported in the Pro edition, that would be why you're seeing an issue (though I don't know why only the receiver files would be missing). Since this is a Platform Designer system (not called Qsys anymore), just delete the component from the system design and add in a serdes for Arria 10 from the IP Catalog.