Forum Discussion

MAlek2's avatar
MAlek2
Icon for New Contributor rankNew Contributor
7 years ago

MIPI D-PHY transmitter on MAX 10 output buffers

Hello! I'm trying to implement MIPI D-PHY transmitter on MAX 10 Dual supply FPGA. In Application Note 754 it is written that: High-speed mode — A differential buffer is used to transmit signals. ...
SreekumarR_G_Intel's avatar
SreekumarR_G_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago
Hello , Actually if the differential line both the end biased with 1.2V m then the Differential voltage is Logic 0 right ? then the output of the is also logic 0.Please note buffer input impedance is high and output impedance is low.Hence even if you apply 1.2V buffer wont burnt out :) Before answering to your question can i know are you following the AN 745 application notes ?Also are you using the SN65MVVD200A ? Thank you, Regards, Sree