Forum Discussion
jaylong
New Contributor
New ContributorMetastable
I'm a beginner, and after designing an adder, I wanted to use SignalTap to check the synthesized signals. However, I found that the signals are not as expected. It seems to be due to metastability is...
FvM
Super Contributor
Super ContributorHi,
does your design meet timing? If not (very likely it doesn't), why do you complain about unexpected results?
I'm not sure what you want to achieve, as a general rule:
- don't use clock as data
- don't use divided or phase shifted clocks, except for special purposes e.g. driving peripherals
