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Altera_Forum
Honored Contributor
Honored Contributormemory initializing into 16-words per line instead of 4 words (initialize from ihex)
This seems strange. In ModelSim (and Quartus, I beleive), our *.hex files initialize what seems to be in 16-word blocks rather than 4-word blocks. I've attached a screenshot each. As you can ...
Altera_ForumHonored Contributor
Honored ContributorFvM,
I've attached both the RAM generation file and the Intel hex file... One solution we thought of is to simply skip 12 addresses at a time: assign reduced_addr = {addr[31:4],2'b0,addr[3:2]}; // this converts 16-word addressing into 4-word addressing This works, but we lose 75% of available memory doing so.
