Forum Discussion
Altera_Forum
Honored Contributor
18 years agoI think there are multiple issues here. First of all, the flash might be configured with dynamic bus sizing which means that a single access from Nios which is 32-bit will translate to two 16-bit operations over multiple cycles. Secondly, with a single master such as a single Nios, you can either read or write a slave but not both at the same time. Hence, it is impossible to control two flash seperately at the same time unless you have more than one master (and multiple tristate_master).
Do you really need to access both flash at the same time?