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Altera_Forum
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10 years ago

Measuring processing time

Hi. Imagine I have the following schematic in Quartus II http://www.alteraforum.com/forum/attachment.php?attachmentid=11037&stc=1 How can I measure the time elapsed from the instant the clock s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

If the data will arrive several clocks later, you will need some sideband "valid" signal generated from the LCG module, which you can connect to the wren port on the ram, or keep as a sideband signal around the ram.

This is not a problem of timing. THis is a problem of the design.