Forum Discussion
FvM
Super Contributor
1 year agoHi,
first I must confess that I don't understand the concept of Agilex 5 (and also Agilex 7 M) SERDES which isn't able to handle commonly used data formats like 8b/10b coded streams or popular data rates natively. It seems to ignore standard application requirements.
Low data rate SERDES can be always implemented in FPGA fabric without using specific IP. Question is if you need to implement CDR with your serial receiver. I guess not because it's neither available for Cyclone V without specific user logic.
There's also an option to use >= 600 MBPS SERDES as an oversampling front end for 192 MBPS, but it's probably simpler to implement low speed SERDES directly.
Regards
Frank
first I must confess that I don't understand the concept of Agilex 5 (and also Agilex 7 M) SERDES which isn't able to handle commonly used data formats like 8b/10b coded streams or popular data rates natively. It seems to ignore standard application requirements.
Low data rate SERDES can be always implemented in FPGA fabric without using specific IP. Question is if you need to implement CDR with your serial receiver. I guess not because it's neither available for Cyclone V without specific user logic.
There's also an option to use >= 600 MBPS SERDES as an oversampling front end for 192 MBPS, but it's probably simpler to implement low speed SERDES directly.
Regards
Frank
- johnson0371 year ago
New Contributor
Hi Frank :
thanks for your reply,
last Mail, you have mentioned that "Low data rate SERDES can be always implemented in FPGA fabric without using specific IP"
I don't know how to implement your suggestion, because SERDEX TX is Pos/Neg edge clock Double Data Rate transmit
method.
Could you offer me some reference Data to let me study how to implement
"192Mb SERDES TX Function without using specific IP"
Sincerely thanks for your technical Support.