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Altera_Forum's avatar
Altera_Forum
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12 years ago

MaxV IO voltage compatibility

Hi everyone, I am working on a MaxV design that needs IO compatibility with ICs that will be powered from 2.3V. Looking at the MaxV datasheet and the pin configurations in Quartus I am led to ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

With FPGA, the voltage settings are also used to translate current strength to output transistor selection.

It's pretty obvious that most of the IO specifications are there to achieve compliance with nominal JEDEC voltage standards. I didn't check with MAX II and MAX V series, but I'm rather sure that similar to Cyclone FPGA, the IO cells will work over the full supported voltage range independent of Quartus settings.