Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Maximum output clock frequency

Hello, I'm trying to build a random code generator using an Altera FPGA (since I do not have started yet, the choice of FPGA series is still open). To specify my system I need to know the max...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi,

yes, I know where to find the literature concerning the devices. But since there are a lot of frequency specs within the datasheets I'm not really sure where to find information about the IO frequency. PLL frequency and core frequency as well as clock tree specs is easy to find but not the maximum IO frequency. Can you please give me further, i.e. more specific information where to find it?

Thanks!