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Firefighter's avatar
Firefighter
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4 years ago

MAXII Code

Hi Intel, I am reading some reference code for MAXII CPLD. It is below. I do not understand what it is doing. Any one can help? maxii_io d_bit_13(.datain ( sck), //serial_clk_out .oe (DC2026_D...
sstrell's avatar
sstrell
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4 years ago

This is an instantiation of a module named max_ii_io. datain, oe, padio, and combout are the I/O of the module and sclk, DC2026_DETECT, SCK_33, and B13 are what they connect to in the current level of the design. The defparam is sending a parameter value of "bidir" to a parameter named operation_mode in the instantiated module.

Firefighter's avatar
Firefighter
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4 years ago

Hi Sstrell,

Thanks for your reply.

Is max_ii_io module a library or something that Quartus integrated, just like DFF? I tried to search it in the project verilog code, but could not find it. I also search it in the MAXII book. No luck.

Cheers

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    4 years ago

    Not a clue. This is just standard Verilog code. I don't know where you got it from or where you saw it.