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Gigiz
New Contributor
New ContributorMAX10M04 / Quartus Prime Lite Edition
Good morning, I'm completing a project with MAX10M04 FPGA and Quartus Prime 20.1 Lite Edition software. The project is in the final phase, everything works fine but I have a very strange problem: I...
Nurina
Regular Contributor
Regular ContributorHi Gigi,
You can fix those warnings by constraining the clock signals using Timing Analyzer. Go to Tools->Timing Analyzer.
Here is a reference on it: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_timequest_cookbook.pdf
Regards,
Nurina
