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Gigiz's avatar
Gigiz
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4 years ago

MAX10M04 / Quartus Prime Lite Edition

Good morning, I'm completing a project with MAX10M04 FPGA and Quartus Prime 20.1 Lite Edition software. The project is in the final phase, everything works fine but I have a very strange problem: I...
Nurina's avatar
Nurina
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4 years ago

Hi Gigi,


Yes, I did. You can ignore most of them, but I suggest you do something about the multiple warnings about overlapping block or symbols. Follow the solution available here: https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/msgs/msgs/egdfx_symbols_overlap_error.htm


Also, I've checked your pin planner and it seems that you are using a clock pin for the EXT_ENC4_ALARM node, I think that's the cause of the problem. Use a differential pin for this node like you did with the other ALARM nodes.


Regards,

Nurina


  • Gigiz's avatar
    Gigiz
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hi Nurina,

    the hardware circuit is just connected to EXT_ENC4_ALARM and it is configured as standard input (I think).

    I use other signals connected to others clock pin without problem.

    The external clock is on pin 27.

    I have also many warnings #332060, How I can configure the CLOCK input and associated it to the other signals ?

    Gigi

  • Gigiz's avatar
    Gigiz
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hi Nurina,

    I have fixed all overlap blocks warnings ID 275059.

    I have many warnings ID 332060 and one ID 332068 (no clocks defined in design),

    how can I fix them ?

    Thanks.

    Best Regards,

    Gigi