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Altera_Forum's avatar
Altera_Forum
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8 years ago

Max10

Hi, I am new in designing FPGA. I have a very simple question, on MAX 10, there are high speed and low speed io pins. My question is does the clock pins on low speed io pins bank have less a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I'm not sure your question is clear. The 'accuracy' depends on quality of the clock you supply the FPGA. This isn't a function of whether you use a clock pin in a high or low speed I/O bank.

Cheers,

Alex