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Tho_Ge
New Contributor
New ContributorMAX10 output driver behaviour
We had an external ADC connected to a MAX10 (10M50). To investigate the signal integrity of the signals between the MAX10 and ADC, eye diagrams of various signals were recorded. We noticed a bit stra...
Tho_GeNew Contributor
New ContributorSorry for my imprecise wording.
The picture "TC73_02_ADC_clock_amp_1_2.png" shows an output of the MAX10, here the clock signal to the ADC (input signal for ADC), with the mentioned levels in the signal curve.
For comparison, "TC73_02_ADC_SDOA_amp_1_2.png" shows the output signal of the ADC (input signal for MAX10), which has no levels in the output signals.
These levels in the output of the MAX10 have been observed on many of the recorded eye diagrams.
