max10 ,onchip_flash,hold timinig violation

hello,

MAX10 (10M08SAE144C*GES)

when I use onchip_flash ip into QSYS,i got hold timing violation in Fast 1200mv 0C model for ufm_block~ADDRESS_DFF. There are no hold timing violation in Slow 1200mV 0C Model and Slow 1200mV 85C Model.

I have tried timing optimization ,but still got hold timing violation.who can give me some help.thanks.

false hold timing record:

; Hold: inst3|altpll_component|auto_generated|pll1|clk[0] ;

+--------+--------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------+---------------------------------------------------+--------------+------------+------------+

; Slack ; From Node ; To Node ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;

+--------+--------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------+---------------------------------------------------+--------------+------------+------------+

; -0.118 ; nios3:inst5|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block~ADDRESS_DFF ; nios3:inst5|altera_onchip_flash:onchip_flash_0|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block~ADDRESS_DFF ; inst3|altpll_component|auto_generated|pll1|clk[0] ; inst3|altpll_component|auto_generated|pll1|clk[0] ; 0.000 ; 0.021 ; 0.872 ;