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Altera_Forum
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8 years ago

MAX10 no response after power cycle

We have been using altera parts for many years, and the VHDL design I am currently using has been in production for over 5 years with a MAXII. Compiled it for the 10M04SCE144 and all is well until...
Altera_Forum's avatar
Altera_Forum
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8 years ago

I believe the two pins that need pullups are nSTATUS and CONF_DONE.

nCONFIG can be tied to the power rail rather than needing a pullup resistor. (per the 'Intel® MAX® 10 FPGA Device Family Pin Connection Guidelines' document).

I believe CONFIG_SEL is ignored if you are only using single configuration images (I have it tied to GND on my design, but the documentation suggests it's not used unless the flash contents calls for it).