Honored Contributor
Honored ContributorJTAG programming of FPGAs came about as an extension of boundary scan testing, a facility to aid manufacturers to determine if boards have been assembled correctly. Extending JTAG to do this programming allowed manufacturers to both test and program boards in one step. As such, JTAG is primarily intended for use in manufacturing test and during development.
The main reasons not to use JTAG as you intend is because it's not completely documented by Altera and it's not intended to be used in that way. If you are intending to host your system from a micro, then there are facilities in other FPGA families specifically designed for this. Cyclone (the family I think you should be considering), Arria & Stratix all support Passive Serial programming. This is a low pin count (as low as 4) programming method that allows daisy chaining of parts. Look at that 'PS Configuration' section of "chapter 8. configuration and remote system upgrades in cyclone iv devices (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf)". Specifically figure 8-14. You don't necessarily need to source the data directly from the external memory, this can come from your micro. --- Quote Start --- we like the internal flash --- Quote End --- Solely for programming? If so, I suggest you boot your Cyclone IV FPGA directly from the micro. Thus removing the need for it. If you want non-volatile for other purposes the strap a $0.50 serial FLASH device to your FPGA. You could (although I suggest you don't) chose to boot your FPGA from this FLASH, connected in an Active Serial configuration - see the same configuration guide above. You'd then connect your Micro to the FPGA via general purpose I/O to support upgrade and general comms. --- Quote Start --- need a way for occasional updates (without having to disassemble the machine, pluggin in additional hardware, running special software, ...) --- Quote End --- I assume you'll have some sort of interface to the micro - UART/network. So, there'll be no need to dismantle anything. If you really must use MAX10, look through Altera's recommended method of field upgrade. App Note 741 - "remote system upgrade for max 10 fpga devices over uart with the nios ii processor (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an741.pdf)". You don't necessarily need a Nios II processor and the interface need not be a UART (this simply demonstrates how few pins are needed. You can do much better with a micro sitting right next to the FPGA). However, the principle is there and this is the route Altera recommend. Cheers, Alex
