Altera_Forum
Honored Contributor
Honored ContributorMAX10 FPGA versus Cyclone V
Hi,
I wrote some VHDL code for the Cyclone V FPGA with ALTLVDS_RX function. Can I use the same code for the MAX10 FPGA? Regards.Forum Discussion
17 Replies
Altera_ForumWhy don't you try it?
- Altera_Forum
If not mistaken, the Max10 support LVDS using soft logic serdes. I think the same CV ALTLVDS_RX might not work if you compile directly. But you could give it a try also. If not working, then try re-instantiate the IPs.
- Altera_Forum--- Quote Start --- Why don't you try it? --- Quote End --- yeah.... just change the device selection and spend a little bit of time to see what is the compilation result.
- Altera_Forum
You can also check in the ALTLVDS_RX user guide to see if there is any device family support list.
- Altera_Forum
what usage you downgrade from cyclone V to MAX10??
- Altera_Forum
Probably to save the cost of flash since Max devices support on chip memory for configuration.
- Altera_Forum
I think the best would to be try out compilation with design in both device to see if can fit or not. Max 10 is of much lesser logic as compare to CV.
- Altera_Forum
MAX10 is a huge downgrade in term of performance compared to cyclone V. your usage really that simple allow you for such down grade?
- Altera_Forum
Agree with pororo. Generally switch from FPGA to CPLD might bump into logic resource concern.
- Altera_Forum
Don't get confused by MAX 10 classification as "CPLD". It's a full featured FPGA with flash configuration memory and can well keep up with previous FPGA families like Cyclone III and has quite similar logic core features.
