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Altera_Forum
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8 years ago

Max10 10M08SAU169 Layout, PDN tool required?

Hello, I have a 4 layer board with Max10 10M08SAU169 (Single Power supply, not using the ADC) device. This is a UBGA package with 0.8mm pitch and I am using several vias, in-between the v...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Thanks for your input.

1) Don't know from where to find out about the 'switching noise generation'. Where is it to be found? Don't see it in the EPE report.

My design Is using the PLL, though I VCCA is isolated from VCCIO 3.3V

Should I increase the 'spacing' between the VCCA trace and rest of the plane carrying 3.3V VCCIO? Current 'isolation / spacing' for unrelated traces is set to only 16 mils. Also, I am using a 'grid' plane versus a solidly Filled polygon, as the plane. That should be fine?

2) The EPE report is showing about 85mA (3.3V rail) and only 1 mA for 2.5V rail (Very surprised as I am driving bunch of LEDs off this IO bank, albeit very rarely. All 1mA of it is Static and 0mA for Dynamic current..?).

A sheet in EPE mentions that for 100mA or over, better to use Switcher supplies. So it seems I am ok with the linear, as you suggested.

Thanks,